Begin3 Title: Alliance Version: 3.2b Entered-date: 12 JAN 1998 Description: A complete system for designing chips using a subset of VHDL http://www-asim.lip6.fr/alliance/ Keywords: VHDL alliance CAD simulator chip CMOS timing analysis Author: (C) ASIM/LIP6/UPMC Maintained-by: alliance-support@asim.lip6.fr Primary-site: ftp://sunsite.unc.edu/pub/Linux/apps/circuits/ Alternate-site: ftp://ftp.lip6.fr/lip6/softs/alliance/ Original-site: ftp://ftp-asim.lip6.fr/pub/alliance/ Platforms: Unix Systems Copying-policy: FRS End