# Intel(r) Wireless MMX(tm) technology testcase for WUNPCKEH # mach: xscale # as: -mcpu=xscale+iwmmxt .include "testutils.inc" start .global wunpckeh wunpckeh: # Enable access to CoProcessors 0 & 1 before # we attempt these instructions. mvi_h_gr r1, 3 mcr p15, 0, r1, cr15, cr1, 0 # Test Unsigned Byte Unpacking mvi_h_gr r0, 0x12345687 mvi_h_gr r1, 0x9abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehub wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x12345687 test_h_gr r1, 0x9abcdef0 test_h_gr r2, 0x00de00f0 test_h_gr r3, 0x009a00bc # Test Signed Byte Unpacking mvi_h_gr r0, 0x12345687 mvi_h_gr r1, 0x7abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehsb wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x12345687 test_h_gr r1, 0x7abcdef0 test_h_gr r2, 0xffdefff0 test_h_gr r3, 0x007affbc # Test Unsigned Halfword Unpacking mvi_h_gr r0, 0x12345678 mvi_h_gr r1, 0x9abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehuh wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x12345678 test_h_gr r1, 0x9abcdef0 test_h_gr r2, 0x0000def0 test_h_gr r3, 0x00009abc # Test Signed Halfword Unpacking mvi_h_gr r0, 0x12348678 mvi_h_gr r1, 0x7abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehsh wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x12348678 test_h_gr r1, 0x7abcdef0 test_h_gr r2, 0xffffdef0 test_h_gr r3, 0x00007abc # Test Unsigned Word Unpacking mvi_h_gr r0, 0x12345678 mvi_h_gr r1, 0x9abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehuw wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x12345678 test_h_gr r1, 0x9abcdef0 test_h_gr r2, 0x9abcdef0 test_h_gr r3, 0x00000000 # Test Signed Word Unpacking mvi_h_gr r0, 0x82345678 mvi_h_gr r1, 0x9abcdef0 mvi_h_gr r2, 0 mvi_h_gr r3, 0 tmcrr wr0, r0, r1 tmcrr wr1, r2, r3 wunpckehsw wr1, wr0 tmrrc r0, r1, wr0 tmrrc r2, r3, wr1 test_h_gr r0, 0x82345678 test_h_gr r1, 0x9abcdef0 test_h_gr r2, 0x9abcdef0 test_h_gr r3, 0xffffffff pass